FPGAs challenge ASICs for system-on-a-chip designs

March 1, 2002
Many of today's image-processing boards use field-programmable gate arrays (FPGAs) to implement low- and high-level image-processing functions, PCI interfaces, and glue logic in a single package.

Andrew Wilson, Editor, [email protected]

Many of today's image-processing boards use field-programmable gate arrays (FPGAs) to implement low- and high-level image-processing functions, PCI interfaces, and glue logic in a single package. But very few vendors, with perhaps the exception of Matrox (Dorval, Quebec, Canada), can afford to develop custom application-specific integrated circuits (ASICs) to add system-on-a-chip platforms to their designs.

However, engineers from IBM (Burlington, VT), Mindspeed (Newport Beach, CA), and Xilinx (San Jose, CA) have announced an FPGA that allows developers to combine embedded processors, high-speed serial transceivers, logic cells, and memory into a single device—in essence, an FPGA that provides custom ASIC-like solutions without the need for costly electronic-design-automation tools and custom foundry processes. Dubbed the Virtex-II Pro Platform FPGA, the part will be offered in five versions with up to 50k logic cells, 3.8k bits of block RAM, up to sixteen 3.125-Gbit/s serial transceivers, and up to four 300-MHz Power PC 405 processor cores per device.

Xilinx's latest FPGA allows developers to combine embedded processors, high-speed serial transceivers, logic cells and memory onto a single device. Dubbed the Virtex-II Pro Platform FPGA, the part will be offered in five versions with up to 50k logic cells, 3.8k bits of block RAM, up to sixteen 3.125-Gbit/s serial transceivers, and up to four 300-MHz Power PC 405 processor cores per device
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Xilinx has recognized the current trend in computer-system architectures from shared to switched fabric; the interest in parallel-to-serial communications interfaces from chip-to-chip, board to-board, and between systems; and the future scalability of such systems. Consequently, the company's Virtex-II Pro FPGAs feature Rocket I/O technology, 3.125-Gbit/s serial transceivers that can be used to implement connectivity standards such as Gigabit Ethernet, 10-Gbit Ethernet, 3GIO, SerialATA, Infiniband, and Fibre Channel on-chip.

Based on a version of the SkyRail technology from Mindspeed Technologies, the multigigabit serial interface allows system designers to develop these emerging connectivity standards as well as to interface intellectual property from Xilinx and third-party vendors. These include the DCT_FI 2D Forward and Inverse Discrete Cosine Transform (DCT) from Cast (Woodcliff Lake, NJ), the FastJPEG_C decoder from Barco Silex (Louvain-la-Neuve, Belgium), and the Xilinx 1-D DCT and color space converters.

On this level of design, however, the time and effort required to test a full system of millions of gates using traditional HDL simulation grows slow and time-consuming. However, in the equivalency checking method of formal verification, the design can be verified in logic blocks against a known-good design whenever an implementation stage has been passed. In this way the system structure can be verified at each stage of the design.

To support this level of functionality, Xilinx offers the Integrated Software Environment (ISE) version 4.2i—ISE 4.2i. According to Anil Telikepalli, Virtex-II Pro marketing manager, this package contains tools to support the PowerPC software modules, software to simulate the Rocket I/O transceivers, and new place and route tools. For further PowerPC support, the company will offer an OEM version of the Diab C/C++ compiler, SingleStep software debugger, and VisionProbe-II JTAG diagnosis tools developed by WindRiver Systems (Alameda, CA). Supporting tools, such as VxWorks RTOS, are available from WindRiver Systems, while synthesis and simulation tools are available from Synopsys (Mountain View, CA).

By packing a multiport 3.125-Gbit/s serial interface into the new devices, Xilinx has primarily targeted the high-speed computing and telecommunications industries with these new parts. What remains to be seen is whether vendors of price-sensitive image-processing boards will adopt the devices. If they do, it will certainly be to pack PCI interfaces, PowerPCs, custom image-processing functions, and high-speed serial interfaces onto a single device. However, few companies have implemented such designs using off-the-shelf and custom parts. Implementing the next-level designs using the Xilinx Virtex-II Pro FPGAs will be a matter of price/performance.

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