Gigabit Ethernet cameras use on-board processors
Understanding the need for camera designers to reduce the time to market of their products, semiconductor vendors have responded with a host of parts that integrate analog front ends, analog-to-digital converters (ADCs), sensor-control logic, and network interfaces into a few devices.
Andrew Wilson, Editor, firstname.lastname@example.org
Understanding the need for camera designers to reduce the time to market of their products, semiconductor vendors have responded with a host of parts that integrate analog front ends, analog-to-digital converters (ADCs), sensor-control logic, and network interfaces into a few devices. Using these devices, camera vendors are building ever-smaller cameras that incorporate greater functionality and reduce costs. In both area-array and linescan designs, the use of these parts lets designers develop products in a modular fashion, so they can produce a range of products based on similar architectures.
The now nearly ubiquitous use of FPGAs in these designs allows cameras to be tailored for high-speed machine-vision and image-processing functions that can be upgraded over the camera’s embedded network interface. Imaginant (Pittsford, NY, USA; www.imaginant.com) has used this approach in cameras developed for scientific area-array applications.
“In developing the HR1100 and HR-200 camera series,” says Robert Hibbard, vice president of imaging at Imaginant, “we looked to separate the image-capture function from image processing, memory, and network interface of the camera.” The result is a modular architecture where the HR-1100 and the HR-200c digital Ethernet cameras can use the same digital electronics for image processing, storage, and network interfacing (see figure on p. 16). Thus, while the HR-1100 uses the 4032 × 2686-pixel KAI-11000 interline-transfer progressive-scan CCD from Kodak (Rochester, NY, USA; www.kodak.com), the HR-200c can use the Kodak 1608 × 1206-pixel KAI-2000.
To digitize images from the sensor, both cameras incorporate the TDA9965-a 12-bit A/D interface from Philips Semiconductors (Eindhoven, The Netherlands; www.semiconductors.philips.com). This device features an on-board clamp and track/hold circuit with adjustable bandwidth, programmable gain amplifier, 12-bit ADC, and reference regulator. After data conversion, 12-bit data are input through a FIFO on-board an FPGA.
“Using the Stratix EP1SXXF672 from Altera (San Jose, CA, USA; www.altera.com),” says Hibbard, we can control the timing parameters of the CCD, the data flow of the image data, and the clock of the camera’s internal 32-bit PCI bus. In both the HR-1100 and the HR-200c cameras, image-processing functions are performed by an on-board TMS320C6415 DSP from Texas Instruments (Dallas, TX, USA; www.ti.com).
With an on-board 32-bit, 33-MHz PCI interface, this 32-bit fixed-point DSP allows images captured in the camera’s up-to-64-bit-wide synchronous DRAM to be processed inside the camera. “Thus,” says Hibbard, “functions such as JPEG image compression or other machine-vision tasks can be processed locally, with the results transmitted over a standard Gigabit Ethernet interface.” To perform this function, the camera incorporates an 82540 Gigabit Ethernet controller form Intel (Santa Clara, CA, USA; www.intel.com).
“Because the DSP and the GigE controller both feature 32-bit PCI interfaces, this data transfer can be performed transparently,” says Hibbard. Since the HR series cameras accept asynchronous trigger signals, they can perform burst image capture synchronized to these trigger signals. Time intervals between the trigger inputs and image capture are adjustable through the camera’s Ethernet interface.
Because of this, multiple HR series cameras can be synchronized to simultaneously capture scenes from multiple angles or to capture scenes at higher effective frame rates. For example, the HR-200c camera can capture images up to 14 frames/s, up to the 15-image capacity of the camera’s internal memory. Subsequent images can be captured after images are transferred to the host PC.
In the future, Imaginant will build on this architecture, introducing a 4-Mpixel camera that will likely use Kodak’s KAI-4011 2k × 2k interline CCD sensor.