System-level FPGAs embed DCTs and FFTs in silicon

Designers of embedded image processing are constantly striving to reduce the parts counts of their systems while increasing speed and functionality. Now, with the increase in density of field-programmable gate arrays (FPGAs) from Altera (San Jose, CA), Xilinx (San Jose, CA), and others, developers of image-processing systems can more easily incorporate previously computationally intensive functions such as the fast Fourier transform (FFT) and the discrete cosine transformation (DCT) in silicon.

Jun 1st, 1999

System-level FPGAs embed DCTs and FFTs in silicon

Designers of embedded image processing are constantly striving to reduce the parts counts of their systems while increasing speed and functionality. Now, with the increase in density of field-programmable gate arrays (FPGAs) from Altera (San Jose, CA), Xilinx (San Jose, CA), and others, developers of image-processing systems can more easily incorporate previously computationally intensive functions such as the fast Fourier transform (FFT) and the discrete cosine transformation (DCT) in silicon.

Previously relegated to digital-signal-processor (DSP) implementations, much research has recently been focused on embedding these algorithms in silicon. At last year`s DSP World trade show, for example, Chris Dick of Xilinx demonstrated an FFT architecture using four Xilinx 4025 devices capable of performing a 2-D FFT on 512 x 512-pixel images at 24 frames/s. According to Dick, to achieve the same transform execution time as that of the company`s multi-FPGA architecture, a parallel array of thirty 40-MHz TMS320C30 devices would be required.

In nonloss image-compression applications, the DCT algorithm is used extensively. Like the FFT algorithm, the DCT has also been implemented in silicon at the Microelectronics Laboratory of the University of Bordeaux (Talence, France). Using Altera 10k Flex FPGAs, researchers have demonstrated how to implement a 2-D DCT by partitioning the algorithm into two, identical, one-dimensional DCT stages.

With these advancements, many companies are looking to leverage this intellectual property as a series of image-processing integrated-circuit cores. Already, several products ranging from broadcast encoders and color space converters are available from a number of companies such as Perigree LLC (Liverpool, NY) and Technical Data Freeway (Concord, MA).

Apart from university- and company-based research and development programs, however, off-the-shelf FFT and DCT implementations are offered only as intellectual property from a few ASIC vendors. However, new products are about to emerge. This month, Hammercores (Maple, Ontario, Canada) becomes the first intellectual-property vendor to offer an FFT processor as a reference design. Developed for high-performance applications, the Hammercores FFT processor performs both complex input and output transforms. Using a mixed Radix-4 and -2 arithmetic unit, the processor can implement any transform of power two. To create an FFT core, the designer specifies the number of points, data and twiddle width, block floating-point precision, and type of memory interface.

As FPGA-based algorithms become commonplace, developers of image-processing systems will be looking for integrated video capture, processing, and display boards to host their FPGA-based designs. Accordingly, companies such as VisiCom (San Diego, CA) are offering PCI- and PMC-based add-in cards complete with image-processing toolboxes to speed systems development.

Like Univision, Secad (Grenoble, Switzerland) and Nallatech (Kilsyth, Glasgow, Scotland) also offer PCI-based reconfigurable processors. Using Xilinx`s XC4010XL devices, Secad`s PCI Reconfigurable Image Advanced Processor (PRIAP) provides an on-board monochrome video decoder and three 16-Mbit memory planes.

As the first image-processing vendor to use Xilinx`s new Virtex FPGA family (see Vision Systems Design, April 1999, p. 72), the Ballynuey PCI card from Nallatech includes PCI interfacing and four DIME module expansion sites for video capture and display, high speed communications, and data capture. According to Allan Cantle, technical director at Nallatech, this card enables developers to construct custom FPGA-based DSP systems using standard products while reducing costs and time to market.

Although single-slot, PCI-based, image-processing boards can perform only a limited amount of real-time processing, they do offer designers a flexible way to implement high-speed applications. In addition, such products can be developed at relatively low cost and reconfigured rapidly for new applications. In the future, the increased capacity of FPGAs coupled to the lower intellectual-property costs of algorithms such as the FFT will prove valuable to developers of image-processing systems.

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