High-level languages speed reconfigurable development

FPGA-based reconfigurable computers combine the speed advantages of parallel hardware with reconfigurability. Edge detection is a computationally intensive low-level image-processing task, well suited to run in parallel. One method uses template operators called Prewitt (or gradient) masks to determine whether a pixel is part of an edge with a particular orientation. A Prewitt mask is a 3 ¥ 3 array of coefficients that are multiplied element-by-element with the 3 ¥ 3 array of image pixel

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High-level languages speed reconfigurable development

Jane S. Donaldson

FPGA-based reconfigurable computers combine the speed advantages of parallel hardware with reconfigurability. Edge detection is a computationally intensive low-level image-processing task, well suited to run in parallel. One method uses template operators called Prewitt (or gradient) masks to determine whether a pixel is part of an edge with a particular orientation. A Prewitt mask is a 3 ¥ 3 array of coefficients that are multiplied element-by-element with the 3 ¥ 3 array of image pixels centered on the pixel being processed. The results of the nine multiplications are added and compared to a threshold value to determine whether the pixel is part of an edge. A different Prewitt mask is applied to detect lines with each different orientation. Horizontal lines, for example, are detected using a north (or south) Prewitt operator.

Using Synplicity-Lite from Synplicity (Mountain View, CA), such masks can be coded in VHDL, simulated, synthesized, placed, routed, and downloaded into FPGAs on Annapolis Micro Systems` Wildfire boards. These contain from one to 16 Xilinx 4000EX FPGAs.

VHDL code for the north Prewitt mask shows the number of operations required to perform this calculation. A single Prewitt mask with thresholding requires five additions, two shift-left, and one comparison. Sixteen Prewitt masks therefore require 80 arithmetic and 48 logical operations, or 128 operations. The implementation of the operations for one Prewitt Mask takes up 1/16 of the Xilinx 4000EX gates so that up to 16 different mask operations can be implemented in one device.

This performance far exceeds digital-signal-processor (DSP) performance. For example, a TMS320C5X DSP would require nine instructions for each Prewitt mask (one load, five accumulate, one compare, one store, and one branch). The DSP uses 144 cycles/pixel for 16 Prewitt masks (compared to the 4000EX`s one cycle/pixel). The DSP operates at 80 MHz, but performs 40 million instruction cycles per second. Therefore, one DSP can process 277,779 pixels/s. If one frame contains 307,200 pixels, the DSP can achieve about nine frames per second (compared to the FPGAs 130 frames/s). In this case, Annapolis` Wildfire board is 160 times faster than the Texas Instruments DSP.

Annapolis Micro Systems

190 Admiral Cochrane Dr., Suite 130

Annapolis, MD 21401

E-mail: jdonald@annapmicro.com.

http://www.annapmicro.com

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Prewitt masks (top left) are used to detect different orientations of edges in images. The North Prewitt mask, for example, detects horizontal edges in images. When coded in VHDL, the number of operations to perform this calculation can be clearly seen.

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