NEC develops programmable parallel processor chip

FEBRUARY 11--NEC Corporation (NEC; www.nec.com)
announced at the 2003 International Solid-State Circuits Conference the successful development of an ultra-high-speed parallel processor single-chip solution that will enable development of real-time video image-recognition applications in a high-level language. Video image recognition is expected to have a major impact on a wide number of applications, including driver safety support systems currently evolving in the field of intelligent transportation systems.

NEC's new parallel processor chip achieves the required performance and programmability through integration of 128 single instruction multiple data processing elements (PEs) that operate on a low frequency of about 100 MHz. With each PE cooperating simultaneously to process the target picture, NEC has achieved high-performance operation at a low rate of power consumption and also enabled extensive programmability through software application.

The peak processing performance has been improved by over 40 times as compared with NEC's conventional products to 51.2 GOPS: 1 billion operations/s. Additionally, power consumption has been reduced to less than one-tenth that of highly efficient general-purpose processors in the 3-GHz class. This achievement is equivalent to putting the total processing power of four of the latest model personal computers inside a personal digital assistant.