Imagers integrate drive

At this year's Vision Show West (San Jose, CA), Eastman Kodak Co. (Rochester, NY) introduced a 1-Mpixel interline CCD image sensor, the KAI-1020, with integrated clock drivers and correlated double sampling. In the design of the 1004 x 1004-pixel resolution device, all the timing inputs are driven by 5-V logic.

To generate the proper voltages for the internal CCD gates, the image sensor has two integrated clock drivers. While the phase-1 and phase-2 drivers control the shifting of charge through the device, the phase-2 driver also controls the transfer of charge from the photodiodes to the vertical shift register. Kodak has also integrated a fast dump driver on-chip, so that an entire row of pixels can be discarded without clocking the row through the horizontal shift register. Each of the two outputs has a correlated double sampling circuit to simplify the analog signal processing in the camera. Camera designers can choose to read the image out of one output at 30 frames/s or two outputs at 48 frames/s.

Already, Adimec (Gold Canyon, AZ) has designed the device into its latest camera, the Adimec-1000m, a 1k x 1k x 10-bit camera that measures 45 x 45 x 75 mm. According to Jim Rapinac, president of Adimec, the camera can capture up to 50 progressive frames/s. When programmed for partial scan or binned readout over the camera's RS-232 interface, the camera can deliver a higher number of frames. The Adimec-1000m uses low-power digital signal processing and delivers video via a Camera Link interface.