Dual-PCI-bus computer increases I/O bandwidth

Cameras that operate at rates of 100 Mpixels/s and be yond are required for high-speed industrial inspection, crash-test analysis, ballistics, airborne sensing, and particle-tracking applications. At present, however, the 32-bit PCI bus clocked at 33 MHz offers only 132-Mbyte/s peak capability, and supporting multiple ultrahigh-speed cameras on single PCI-based systems is not possible. "Although extended PCI standards allow for doubling data path width and clock rate, computer products based on

Dual-PCI-bus computer increases I/O bandwidth

--ANDREW WILSON

Cameras that operate at rates of 100 Mpixels/s and be yond are required for high-speed industrial inspection, crash-test analysis, ballistics, airborne sensing, and particle-tracking applications. At present, however, the 32-bit PCI bus clocked at 33 MHz offers only 132-Mbyte/s peak capability, and supporting multiple ultrahigh-speed cameras on single PCI-based systems is not possible. "Although extended PCI standards allow for doubling data path width and clock rate, computer products based on such standards are rare and costly," says Jeff Wilson, vice president of sales and marketing at Bitflow (Woburn, MA).

Because of this, Microdisc (Yardley, PA) has developed a system based on the S450NX MP, a dual-PCI server board from Intel (Sunnyvale, CA). Featuring four 400-MHz Pentium Xeon processors linked via a processor host bus, the motherboard uses the Intel 82450NX PCI chipset to provide an integrated bridge and memory controller and an I/O PCI core targeted to multiprocessor systems.

Consisting of five components, the 82450NX PCI chipset has a memory and I/O controller (MIOC), PCI expander bridge (PXB), a RAS/CAS generator, and two data-path multiplexers (MUXs). Responsible for accepting access requests from the host processor bus, the MIOC monitors the host bus, examining addresses for each request and directing them to a request queue for subsequent forwarding to the PXB and hence the PCI buses.

To support the high data rates re quired for multiple high-speed camera systems, Microdisc uses the two independent 32-bit, 33-MHz PCI buses that are provided by the PXB on the S450NX MP motherboard. These two buses are processed completely independently except where transactions are forwarded across the expander bus between the PXB and the MIOC.

At Photonics West (Jan. 23-29, 1999; San Jose, CA), Bitflow demonstrated a prototype of the system using two cameras from Dalsa (Waterloo, Ont., Canada), each delivering 100-Mbyte/s image data to system memory via two Road Runner digital camera-interface boards. On one PCI slot, image data from the Dalsa CA-D6-0256W area camera were captured at 955 frames/s. At the same time, the Dalsa CT-P1-4096W linescan camera was delivering 23,000 lines/s, each 4096 pixels long, into system memory via the second PCI interface.

"This system works with the quickest industrial cameras and also replaces hard-to-program DSP and pipeline processors in many applications" says William Petritis, national sales manager for Microdisc. "And by adding cameras at critical points, we can capture several seconds of continuous-process imagery prior to defect detection."

In addition, the system`s 200-Mbyte/s I/O throughput could support a single, demanding camera rather than two of them. Providing the 200 Mbytes/s required for the CT-E3 4k time-delay-integration camera from Dalsa and the 160 Mbyte/s for the ES 1.0/1260, 1k ¥ 1k, 12-bit camera from Eastman Kodak (San Diego, CA), for example, requires coupling both independent PCI buses. To do so using the S450NX MP architecture, systems integrators could use two Road Runner frame grabbers each attached to an independent PCI bus. By using the on-board SyncBus on each frame grabber, digital data could be input to both PCI buses, providing the throughput needed to support cameras such as the CT-E3 and the ES-1.

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