Programmable array allows high-speed interface designs

Developers of PCI-based frame grabbers, image processors, and display controllers have often been restricted by the theoretical 132-Mbyte/s data-transfer limit of the 32-bit, 33-MHz PCI bus. To increase system performance, many vendors are looking to implement a 64-MHz clock speed and 64-bit addressing for a maximum throughput of 524 Mbyte/s. Now, in a move that brings programmable logic to the forefront of high-performance system-level integration, Xilinx (San Jose, CA) has developed the Real 6

Programmable array allows high-speed interface designs

Developers of PCI-based frame grabbers, image processors, and display controllers have often been restricted by the theoretical 132-Mbyte/s data-transfer limit of the 32-bit, 33-MHz PCI bus. To increase system performance, many vendors are looking to implement a 64-MHz clock speed and 64-bit addressing for a maximum throughput of 524 Mbyte/s. Now, in a move that brings programmable logic to the forefront of high-performance system-level integration, Xilinx (San Jose, CA) has developed the Real 64/66 PCI software core that enables designers to structure single-chip, 64-bit, 66-MHz, PCI v.2.2 bus-compliant interface systems. In addition to the software core, Xilinx has also developed a faster Virtex FPGA-6 for 64-bit, 66-MHz PCI designs.

"The Real 64/66 PCI represents the first time that an FPGA supplier has delivered a general-purpose solution before manufacturers of standard chipsets," claims Wim Roelandts, Xilinx president and chief executive officer. "This underscores the benefits of FPGAs and, more importantly, allows designers to integrate 66-MHz PCI systems," he adds.

At a price of $14,995, the Real 64/66 PCI helps designers to implement a 64-bit, 66-MHz PCI interface in a standard Virtex FPGA, fully compliant to the Version 2.2 specification and supporting a sustained throughput of 528 Mbyte/s. In an XCV300 FPGA, the PCI core occupies just 12% of resources, which makes more than 260,000 system gates available for designers to add dual-port customized FIFOs, a DMA controller, and other custom logic functions. In an XCV1000 FPGA, the PCI core occupies only 3% of resources.

More than a dozen beta companies have been designing the Real 64/66 PCI into devices such as gigabit Ethernet, ATM, and Fibre Channel adapters; imaging boards; disk-drive arrays; and high-end printer interfaces, according to Xilinx. These companies include Ascend Communications (Westford, MA), Cisco Systems (San Jose, CA), Eastman Kodak (Rochester, NY), and Dome Imaging (Waltham, MA).

"Using the Real 64/66 PCI products from Xilinx, we implemented a PCI interface and other functions, such as direct memory access, four dual-port FIFOs, and 200,000 gates of our own unique design, in a single device," says John Beck, principal engineer at Dome Imaging. Dome`s MX2/PCI board is the first in a family of display controllers for medical-imaging products that can handle transfers of more than 500 Mbyte/s from the host.

To support designers in developing PCI-based solutions, both Synopsys (Mountain View, CA) and Synplicity (Sunnyvale, CA) support the Real 64/66 PCI core in their design flows."The Real 64/66 PCI solution allows FPGA developers to implement bus designs using the Synopsys FPGA Compiler II and FPGA Express synthesis tools," says Jay Michlin, FPGA vice president and general manager at Synopsys. Synplicity also supports Xilinx`s 64-bit, 66-MHz PCI core with its Synplify logic synthesis tool.

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