Compact PCI bus complements existing standards

Since the CompactPCI (CPCI) standard was initiated by Ziatech (San Luis Obispo, CA) in 1994, it has evolved to the point where it has become a popular form factor for CPU, tele communications, input/output (I/O), data-acquisition, and image-capture, processing, and display-board vendors. Indeed, during the past two months, more than 10 frame-grabber, image-processing, and machine-vision-system boards have been announced that use CPCI as their form factor (see "CPCI-based frame grabbers duel PCI

Compact PCI bus complements existing standards

Andy Wilson, Editor at Large

andyw@pennwell.com

Since the CompactPCI (CPCI) standard was initiated by Ziatech (San Luis Obispo, CA) in 1994, it has evolved to the point where it has become a popular form factor for CPU, tele communications, input/output (I/O), data-acquisition, and image-capture, processing, and display-board vendors. Indeed, during the past two months, more than 10 frame-grabber, image-processing, and machine-vision-system boards have been announced that use CPCI as their form factor (see "CPCI-based frame grabbers duel PCI and VME types," p. 73).

Initially embraced by the communications industry as a rugged, low-cost, industrial-strength bus, CPCI now includes standards that allow developers to build hybrid CPCI/ VME64x systems that em brace hot-swap capability. Indeed, 3U (half-height) CPCI boards--which in clude about 80% of the currently available imaging boards--seem to have found a home where front-panel space/volume is a primary design requirement, according to W. Wade Wyatt, business-development manager of Smart Module Technologies (Fremont, CA).

Standard popularity

The reasons for CPCI popularity are numerous. For instance, its rugged form factor allows boards to be built in 3U and 6U formats at relatively low cost. And, because it is an evolutionary standard that emerged from the PC industry, it offers developers low-cost software-development tools and silicon implementations.

Unlike system architectures of the past, such as Multibus II, which were radically different from other available buses of the time, CPCI is an evolutionary architecture that seeks to offer the benefits of more-expensive solutions (such as VME) with low-cost PC-based silicon architectures. But the real key to the success of CPCI is that the standard seeks to remain complementary to both PCI and VME architectures.

Indeed, the latest specifications from the PCI Industrial Computer Manufacturers Group (PICMG; Wakefield, MA) will enable developers to configure hybrid CompactPCI/VME64x platforms and define the mapping of PCI mezzanine cards (PMCs) and industry-pack (IP) modules. All three structures provide systems integrators with access to a variety of existing communication and data-acquisition functions available from vendors of PMC and IP modules. Better still, the PICMG is now field-testing the hot-swap infrastructure software for Microsoft Windows NT 5.0 developed under contract to the PICMG by Pigeon Point Systems (Scotts Valley, CA).

With all these factors in place, developers of image-processing systems will be able to build systems using VME boards, lower-cost CPCI boards, and all available PMC and IP modules. This will allow a wide range of image-processing systems to be developed using a number of different form factors. Unlike PCI-based systems, which are limited in terms of expandability and card functionality, CPCI systems will be able to leverage from existing CPCI, VME, PMC, and IP modules already on the market. Developers will be able to structure a range of image-processing systems with different price-performance ratios. Whereas in combined VME/CPCI systems the VME bus will most likely be used as the I/O bus, the CPCI bus will be used for system-level extensions.

Whatever imaging systems are configured, the developers of such systems are likely to be winners. Not only because CPCI-related architectures offer a greater choice of image-capture, process, and display modules, but also because CPCI will decrease the time to market of future image-processing systems and will lower costs.

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