SEPTEMBER 10--Motorola (Tempe, AZ; www.motorola.com) has successfully made transistors in a thin layer of gallium arsenide (GaAs) grown on a silicon wafer. The key to the process is a unique compliant layer that bonds to both silicon and GaAs. Except for the application of the GaAs and bonding material layers, standard semiconductor process and tooling were used, and the resulting GaAs transistors have characteristics virtually identical to those made in a standard GaAs process.
While Motorola has done much of its development work at the 6-in.level, it has already demonstrated GaAs on 8- and even 12-in. silicon wafers. Motorola also says it understands the physics well enough to extend the concept to combine other high-performance materials such as indium phosphide and gallium nitride with silicon, which could accelerate the commercial viability of products using these advanced materials.
One application involves mixing silicon CMOS and GaAs (or other III/V materials) on a single chip. This would allow combining high-density CMOS logic and memory on the same chip with high-frequency GaAs analog, which could obsolete today's conventional wisdom that some products (for example, cell phones) will always require at least two chips. Placing all components on one chip also offers performance enhancements by eliminating the speed loss and power consumption that result from driving signals from chip to chip.
The first patents have been issued, and Motorola says it has move than 270 applications filed to date.
