Reconfigurable imaging shines at DSP World show

The theme at DSP World Expo in Boston last month was reconfigurable computing and, in particular, reconfigurable image processing. The concept is simple. Image processing algorithms written in a high-level language such as Verilog or VHDL can be downloaded into FPGAs where they will run in a parallel fashion, outperforming conventional architectures.

Reconfigurable imaging shines at DSP World show

The theme at DSP World Expo in Boston last month was reconfigurable computing and, in particular, reconfigurable image processing. The concept is simple. Image processing algorithms written in a high-level language such as Verilog or VHDL can be downloaded into FPGAs where they will run in a parallel fashion, outperforming conventional architectures.

In reality, says Bo Varga, president and CEO of Giga Operations (Berkeley, CA), "programming these devices is difficult." Despite this, his company and Annapolis Microsystems (Annapolis, MD) both showed reconfigurable compute engines at this year`s DSP World.

Giga Op`s G900 reconfigurable interface card is a PCI-based board that can support up to 32 Xilinx FPGAs, 128 Mbyte of DRAM, and 4 Mbyte SRAM. FPGA mezzanine cards, called XMODs, stuffed with two FPGAs and memory, can be plugged into the board in a modular fashion. Annapolis Micro Systems also offers Xilinx-based reconfigurable boards in PCI and VME versions. On the VMEbus the company`s Wildchild is a 6U card with eight processing elements per card. Wildforce, a PCI version, contains four processing elements and a user-programmable crossbar switch.

Wayne Threatt, industry consultant with Wayne B. Threatt Associates (Boston, MA), remains cynical about the concept of programmable computing. "Ask them to do anything that isn`t in a canned demo," he says, "and they can`t. The software tools are just not in place yet."

Perhaps a more conservative approach to reconfigurable processing will be announced next month by Pentek (Upper Saddle River, NJ). According to Roger Hosking, vice president, the company is about to unveil a dual reconfiguable processor board for the VME. Dubbed the Model 9120 approach, the design of the processor uses a Flex10K array from Altera (San Jose, CA). By placing two devices in the center of a dual-pipelined architecture, developers can perform dataflow processing by reprogramming the gate array for various functions. "Initially," says Hosking, "the board will be used to implement Viterbi decoding but could be used for video decompression and other imaging functions."

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