Genlock chip triggers ADCs

In digitizing video, the ML6430 genlock chip extracts timing signals from NTSC, PAL, or VGA signals and uses a series of PLLs to lock the output waveforms, reducing jitter to less than 500 ps. One of the outputs of the device triggers the sampling of the ADC that digitizes video, eliminating the need for other timing ICs. This output can be programmed to produce a 54-, 27-, or 13.5-MHz signal. The IC also produces horizontal and vertical reset signals and provides a clamp and burst clamp outp

Genlock chip triggers ADCs

In digitizing video, the ML6430 genlock chip extracts timing signals from NTSC, PAL, or VGA signals and uses a series of PLLs to lock the output waveforms, reducing jitter to less than 500 ps. One of the outputs of the device triggers the sampling of the ADC that digitizes video, eliminating the need for other timing ICs. This output can be programmed to produce a 54-, 27-, or 13.5-MHz signal. The IC also produces horizontal and vertical reset signals and provides a clamp and burst clamp output that can be used to set the dc level and AGC of incoming video. Micro Linear, 2092 Concourse Drive, San Jose, CA 95131; (408) 433-5200; e-mail: info@ ulinear.com.

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