Samsung 90-nm process technology integrates multilayer and copper-wiring technology
MAY 30--Samsung Semiconductor Inc. (San Jose, CA; www.usa.samsungsemi.com), a wholly owned US subsidiary of Samsung Electronics Co. Ltd., has announced its 90-nm logic-process technology for system-on-a-chip designs.
MAY 30--Samsung Semiconductor Inc. (San Jose, CA; www.usa.samsungsemi.com), a wholly owned US subsidiary of Samsung Electronics Co. Ltd., headquartered in Seoul, Korea, has announced its 90-nm logic-process technology for system-on-a-chip (SOC) designs. The new technology will enable Samsung to gain a competitive stance in the next-generation high-speed logic market. Samsung's 90-nm process technology enhances speed and supports the low-power consumption and high-performance requirements of next-generation IT equipment.
The technology features an ultrathin 1.6-nm gate-insulating film, a 70-nm effective gate length, an ultrashallow junction technology, and a copper damascene technology using low-k dielectric. With this process technology, SOC speed is enhanced 30% compared to current 0.13-μm process technology.
The integration of a 1.25-square μm SRAM cell improves memory density while reducing the chip area by 50%. The smaller chip size greatly reduces manufacturing costs.
According to the International Technology Roadmap of Semiconductor, a semiconductor technology forecaster, 90-nm process technology is expected to be commercialized in 2004. Samsung's initial applications of 90-nm SOC process technology are mobile phone CPUs and SOC devices.