Program enables bridging

Dec. 19, 2006
Serial RapidIO-to-PCIe Bridge IP Core is designed for applications that require high-bandwidth bridging between PCI Express devices and Serial RapidIO fabrics and devices. It bridges a 4X serial RapidIO port, operating up to 3.125 GHz, to an 8X PCI Express port operating at 2.5 GHz, through an intelligent nontransparent bridge. It features complete protocol translation, an optimized dual-channel multithreaded DMA engine, and a pipelined PCI Express-to-RapidIO mapping table.

Serial RapidIO-to-PCIe Bridge IP Core is designed for applications that require high-bandwidth bridging between PCI Express devices and Serial RapidIO fabrics and devices. It bridges a 4X serial RapidIO port, operating up to 3.125 GHz, to an 8X PCI Express port operating at 2.5 GHz, through an intelligent nontransparent bridge. It features complete protocol translation, an optimized dual-channel multithreaded DMA engine, and a pipelined PCI Express-to-RapidIO mapping table to address high-throughput streaming applications. It also features mailbox message queueing, PCIe MSI/MSI-X interrupt controller, RapidIO-to-PCIe Atomic transaction encapsulation, access protection, real-time event counters, and error management.
Mercury Computer Systems
Chelmsford, MA, USA
www.mc.com/ip

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