Bus wars rage, but VME endures

During the past 20 years, several computer bus architectures have appeared, reigned, and withered. Although some are still in use in many vision/imaging systems, vendors who have initially supported ISA, EISA, and STD bus architectures are now migrating to the higher-performance PCI and CompactPCI (CPCI) buses.

Apr 1st, 2000

During the past 20 years, several computer bus architectures have appeared, reigned, and withered. Although some are still in use in many vision/imaging systems, vendors who have initially supported ISA, EISA, and STD bus architectures are now migrating to the higher-performance PCI and CompactPCI (CPCI) buses.

However, the nearly 20-year-old VME bus is still going strong. With its massive installed base, support for 21 slots, and efficient interrupt scheme, the VME bus has experienced a number of revisions during its lifetime (see "VME boards target high-performance computing applications," p. 39).

Meanwhile, at the Bus and Boards conference held in San Diego, CA, in February, General Micro Systems (GMS; Rancho Cucamonga, CA) and Arizona Digital (Scottsdale, AZ) hiked the burst data transfer of the VME bus to 528 Mbytes/s using a standard VME320 backplane and VME64/PCI bridge components. The VME bus system used for the conference demonstration consisted of a 21-slot VME320 backplane designed by Arizona Digital, a General Micro Systems 255 CPU board, a frame buffer card, a video card, and miscellaneous legacy VME cards. During the demonstration, data were transferred one line at a time between the frame buffer and video cards at a burst transfer rate of more than 528 Mbytes/s to a video monitor.

To take advantage of the gigabyte-per-second data-transfer rates expected to be achieved by the VME320 backplanes, GMS is also developing a VME64 bridge chip that will, according to company president Benjamin Sharfi, provide 10-15 times the performance of its nearest bus competitor. Leveraging 2eSST technology, the chip can support sustained data-transfer rates of 528 Mbytes/s, an artificial limit imposed by the 64-bit, 66-MHz PCI side of the bridge. In the future, as PCI local bus speeds increase, GMS will increase the chip's VME performance, and designers are forecasting sustained data-transfer rates in excess of 1 Gbyte/s.

With this renewed interest in increasing VME performance, other companies are said to be showing interest, according to industry analysts. They claim that Cetia (Burlington, MA) and IBM (Armonk, NY) are also working on a VME interface chip that exceeds 500 Mbytes/s and that Tundra (Kanata, Ontario, Canada) is exploring VME320/584.

"At next year's Bus and Board conference," says Ray Alderman, executive director of the VMEbus International Trade Association (Scottsdale, AZ), "we will show VME running at 1 Gbyte/s over a 21-slot backplane that will be 100% backwards-compatible with the first VME card ever made."

But what of CompactPCI, the PCI-based contender to the VME bus? "As far as performance goes, PCI is bad, and CompactPCI is worse," asserts Alderman. "When you put PCI chips on a backplane bus [similar to CPCI], then every time you double your clock frequency, the number of slots you can drive is reduced by about 40%-50%, that is, eight slots at 33 MHz, four or five slots max at 66 MHz, and maybe two slots with PCI-133. Besides, Intel is killing-off PCI as a technology. In 18 months, the backplane I/O system [now PCI slots] in servers will be like ISAµhistory," he insists.

Certainly, Intel is moving on with I/O channel technologies, such as Infinibandµa technology designed to connect servers with remote storage and networking devices. According to Intel, this will also be used inside servers for interprocessor communications in parallel clusters. And it seems certain that PCI chip suppliers will embrace this technology. What this all means for the CPCI bus is still, however, speculation. The winning bus architecture will prove itself in the field; just take a look at VME.

Andy WilsonEditor at Large
andyw@pennwell.com

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