Chip set lowers camera cost

In developing high-resolution CCD or CMOS cameras, many analog front-ends (AFEs) from company's such as Analog Devices (Norwood, MA) and Texas Instruments (Dallas, TX) are interfaced to off-the-shelf DSPs or embedded cores (see Vision Systems Design, Aug. 2000, p. 37).

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In developing high-resolution CCD or CMOS cameras, many analog front-ends (AFEs) from company's such as Analog Devices (Norwood, MA) and Texas Instruments (Dallas, TX) are interfaced to off-the-shelf DSPs or embedded cores (see Vision Systems Design, Aug. 2000, p. 37).

Targeted mainly at the consumer market, such AFEs are now pushing their performance in terms of supported sensor resolution and speed and at the same edging their way into the industrial imaging market. Startup Nucore (Santa Clara, CA) released a two-chip set consisting of an AFE and a digital image processor in August. Dubbed the NDX-1250 AFE and the SiP1250 Smart Image Processor (SIP), the chips let designers build cameras that can acquire, enhance, compress, display, and store 4-Mpixel images at 12 frames/s and 1.3 million-pixel images at 30 frames/s with 12-bit accuracy. According to Joseph Raffa, president of Nucore, the NDX-1250 is a CCD and CMOS digitizer that includes a differential correlated double sampler (CDS), black-level autocalibration circuitry, a programmable gain amplifier (PGA), and a 12-bit analog-to-digital converter.

In operation, the CDS removes spurious low-frequency noise from the sensor signals by taking two samples of the sensor output, one with the signal data present and one without. By subtracting the two samples, any noise that is common or correlated to both of the samples is removed. This process is performed on a pixel-by-pixel basis at 50 million pixels/s. Analog black-level calibration is separately performed for each color.

On-chip dynamic range expansion allows the NDX-1250 to process red, green, and blue (RGB) signals separately, so that processing one color does not affect the processing of the next. The SiP-1250, a pipelined processor designed for image processing, is a companion device for the NDX-1250. Image-processing algorithms implemented in register-programmable hardware include Bayer-to-RGB conversation, color correction, gamma correction, and YC conversion.

To ease the development of cameras based on the technology, Nucore is also offering a camera reference design. This will be based on the SH2 32-bit RISC-embedded microcontroller from Hitachi Semiconductor (San Jose, CA) and the µITron 3.0 embedded operating system from Tron Association (Tokyo, Japan). Although little known in the United States, the µITRON real-time operating system is an industry standard in the embedded control systems OS field in Japan. Indeed, according to the Tron Association, approximately 30% of the embedded systems developed recently in Japan use a µITron specification real-time OS. The specifications for Revision 4.0 of the operating system can be downloaded from www.itron.gr.jp/home-e.html.

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