Teledyne DALSA's FPGA and developer toolset enable processing in real time

Teledyne DALSA's Xcelera-CL VX4 FPGA-based vision processor and Sapera APF graphical development environment enable user programming for fast implementation of real-time image-processing applications.

Teledyne DALSA Xcelera-CL VX4 FPGA-based vision processor and Sapera APF graphical development environment
Teledyne DALSA Xcelera-CL VX4 FPGA-based vision processor and Sapera APF graphical development environment

The Xcelera-CL VX4 FPGA-based vision processor and Sapera APF graphical development environment enable user programming for fast implementation of real-time image-processing applications. The point-and-click environment with embedding image-processing libraries allows software and hardware engineers to program image acquisition from one Base, Medium, or Full Camera Link camera, with an extended feature set that supports advanced Camera Link pixel/tap configurations.
Teledyne DALSA
Waterloo, ON, Canada

-- Posted by Vision Systems Design

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NEW PRODUCT PRESS RELEASE

Teledyne DALSA Launches Real-time FPGA Processing Platform

Xcelera-CL VX4 and Sapera APF: Next Generation Vision Processors with an Integrated Graphical FPGA Development Platform

Teledyne DALSA is pleased to present its next generation user programmable real-time image processing platform. The Xcelera-CL VX4 and Sapera APF deliver a powerful FPGA (field-programmable gate array) based vision processor and integrated graphical FPGA development environment. This user programmable FPGA technology enables users to adopt vision processors for a variety of high speed, computing intensive, real-time image processing applications.

Key Features and Benefits of the Xcelera VX4:
Next Generation real-time FPGA Image Processing Platform

Real-time FPGA based hardware processing
Fully supported by Sapera APF, an integrated graphical FPGA development environment
Half-length PCI Express x4 Board
Acquires images from one Base, Medium or Full Camera Link camera
Extended feature set supports advanced Camera Link pixel/tap configurations
Windows XP and Windows 7 (32/64-bit) compatible

Key Features and Benefits of Sapera APF:
Graphical FPGA Development Environment for Software and Hardware Engineers

Point and Click programming environment
Over 150 imaging functions in FPGA-based embedded image processing libraries
Design simple, single pass or complex iterative algorithms
High level behavioral simulation
Verify designs to cut down development time
Fully automated design process interfaces to Sapera LT
Supports Xilinx Virtex 5 family

SOURCE: Teledyne DALSA

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