SEPTEMBER 22--Transtech DSP (Ithaca, NY; www.transtech-dsp.com) now offers libraries, blockset, and utilities to support application development on its DSP's popular Xilinx Virtex-II based PMC module using Xilinx System Generator for DSP v 6.2. This contains building blocks for constructing DSP and other digital systems in FPGAs using MATLAB/Simulink. Initially just FPGA aware, the blockset now means that external resources to the FPGA such as QDR SRAM and PCI interfaces can be used and exploited to the full for a complete solution both saving and simplifying application development.
System Generator enhances the time-saving high-level graphical design methodology provided by MathWorks' Simulink package for DSP, which allows designs to be easily implemented within Xilinx FPGAs. Transtech further leverage this technology by providing library application interfacing and co-simulation blocksets plus Matlab Executable (MEX) functions to facilitate highly automated construction of board-level applications. This abstracts designers from the low-level hardware, allowing them to concentrate on their algorithm development.
The support package includes
MEX (Matlab EXecutable) function for configuring PMC-FPGA02 boards given a Xilinx bitstream file.
MEX functions for reading registers and performing high-speed DMA transfers.
System Generator blocks dealing with I/O connectivity in a Simulink library for PMC-FPGA02 components.
PCI based example connecting slave FIFO interfaces as well as register interfaces via the provided Simulink blocks.
Post System Generator processing: automatically connects the produced System Generator component to the PMC-FPGA02 IO interfaces by modifying the top-level VHDL file.
Functions and cosimulation tools evaluated for use under the Microsoft Windows 2000 and Windows XP operating systems.
